• Tag : STP

 
 

Spanning tree network super root

Description Arista MLAG supports STP for Layer-2 loop detection. In fact, most customers enable STP in their MLAG(s) to ensure no downstream Layer-2 loops due to mis-cabling or mis-configuration. Pre 4.25.1F EVPN All-Active multihoming mechanism did not support STP downstream because of the following reasons: Unlike MLAG, EVPN multihoming peers run STP independently. Hence, all EVPN multihoming PEs send BPDUs independently on port-channel links. STP BPDUs will have Bridge ID derived from the local system MAC address, so the BPDUs generated by each multihoming PE are different.  Hence, the downstream multihomed switch/server receives different BPDUs from different PEs, so STP...
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Adding MLAG to existing configuration impact

Hello, I’m a bit new to Arista but I have 1 in my environment I work with.  For a long time we had a single Arista switch running a set of hosts.  Recently we procured a second one to add in HA with MLAGs.  I am going through the planning to add the new switch and hoping to avoid any outages but from what I tell theres really no way around an outage. So currently we have a compute system connected in a LAG on port-channel 1 via 2 of its 40gb ports. We have LAG on port-channel 2 to...
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Automatic STP self loop recovery

Description When a switchport receives its own STP BPDU, the port goes into role ‘Backup’ and state ‘Discarding’. The port is said to be in a self looped state. This is most often seen as a transient network anomaly that happens during upgrade scenarios or due to a misconfiguration. On previous EOS versions, the port stays in the self looped state even if the port stops receiving its own STP BPDUs. The port had to be shut down and restarted to recover from this state. This feature allows the port to resume normal operations without any intervention when: The port...
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MLAG ToR pair to switches in U-shape

Hi Guys, Just want check how to configure Arista EOS to support the following ToR1 —-ToR2 |               | SW1 —- SW2 ToR1 & ToR2 are Arista MLAG pair to appear as single logical switch SW1 & SW2 is access sw running STP protocol Rgds Art  

STP in MLAG

Hi all, I just wanted to know how does Stp works in MLAG. Anyone document would really help me.

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